The fabrication of integrated circuits (“IC”) devices involves the performance of a range of processing steps. In particular, patterned layers of various materials are applied to a substrate to create the desired device. The patterns of the layers are accurately aligned to ensure proper operation of the resultant circuit. Misalignment of the layers will degrade the performance of the IC. As IC designs have become increasingly complex, the critical dimensions (“CDs”) thereof have been correspondingly reduced, resulting in a reduction in acceptable relative displacement of the various IC device layers.